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Intel’s giant FPGA could be forerunner to AMD-like chiplet architectures

Intel has announced the world’s largest FPGA (field programmable gate array), a whopping 43.3bn transistor package featuring dual FPGA dies glued together with its EMIB interconnect technology. Perhaps a precursor to Intel’s “mix and match” chiplet processor designs to come, Intel’s rolling out its EMIB technology once again, this time between two fully-fledged compute dies.

The Stratix 10 GX 10M FPGA utilises twin dies to offer unrivaled size and performance for a chip of its kind – at 10.2 million logic elements. The company’s EMIB (Embedded Multi-die Interconnect Bridge) now sits between the two adjacent dies on the Stratix package for the first time, allowing for a massive inter-die bus of 25,920 connections – or 6.5TB/s of bandwidth (via Tom’s Hardware).

Previously, EMIB had been used in limited applications, such as the Kaby Lake G processor. This was a cooperative venture with AMD, which connected a Vega GPU chip to High Bandwidth Memory close by on the package. Now, it seems, Intel has started to up its game and use this technology to connect two logical dies – ostensibly achieving the same results as AMD’s Infinity Fabric interconnect.